./goblint --conf conf/svcomp.json --sets ana.specification /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/properties/no-overflow.prp --sets exp.architecture 64bit /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i


--------------------------------------------------------------------------------


[0;33m[Warning] --sets is deprecated, use --set instead.[0;0;00m
[0;33m[Warning] --sets is deprecated, use --set instead.[0;0;00m
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:277:3-284:3 with factor 6
[Info] unrolling loop at lib/libc/stub/src/stdlib.c:10:5-12:5 with factor 12
[Info] unrolling loop at lib/libc/stub/src/stdlib.c:21:9-27:9 with factor 4
[Info] unrolling loop at lib/libc/stub/src/stdlib.c:40:3-45:3 with factor 6
[Info] Setting "ana.int.interval" to true
[Info] function main uses mod, enable congruence domain recursively for:
[Info]   "down":
[Info]   "up":
[Info] no thread creation -> disabling thread analyses "race, deadlock, maylocks, symb_locks, thread, threadid, threadJoins, threadreturn, mhp, region"
[Info] Enabled congruence domain.
[Info] Enabled octagon domain ONLY for:
[Info] c, putchar, i, count, tmp, key, a, count, j, k, size, i, i___0, j___0, a, top, expression
[Info] Enabled widening thresholds
[Info] SV-COMP specification: CHECK( init(main()), LTL(G ! overflow) )
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:276:16-276:35)
[Warning][Integer > Overflow] DefExc: Value was outside of range, indicating overflow, but 'sem.int.signed_overflow' is 'assume_none' -> Returned Bot (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:276:16-276:35)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:278:5-278:17)
[Info][Deadcode] Logical lines of code (LLoC) summary:
  live: 10
  dead: 0
  total lines: 10
[Warning][Deadcode][CWE-571] condition 'c <= 32' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:277:10-277:15)
[Warning][Deadcode][CWE-570] condition 'c % 8 == 0' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:279:9-279:19)
[Warning][Deadcode][CWE-571] condition 'c <= 32' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:277:10-277:15)
[Warning][Deadcode][CWE-570] condition 'c % 8 == 0' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:279:9-279:19)
[Warning][Deadcode][CWE-571] condition 'c <= 32' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:277:10-277:15)
[Warning][Deadcode][CWE-570] condition 'c % 8 == 0' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:279:9-279:19)
[Warning][Deadcode][CWE-571] condition 'c <= 32' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:277:10-277:15)
[Warning][Deadcode][CWE-570] condition 'c % 8 == 0' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:279:9-279:19)
[Warning][Deadcode][CWE-571] condition 'c <= 32' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:277:10-277:15)
[Warning][Deadcode][CWE-570] condition 'c % 8 == 0' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:279:9-279:19)
[Warning][Deadcode][CWE-571] condition 'c <= 32' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:277:10-277:15)
[Warning][Deadcode][CWE-570] condition 'c % 8 == 0' is always false (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/termination-bwb/display-bit1.i:279:9-279:19)
SV-COMP result: unknown
[Info][Witness] witness generation summary:
  total generation entries: 1
