./goblint --conf conf/svcomp.json --sets ana.specification /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/properties/no-overflow.prp --sets exp.architecture 32bit /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c


--------------------------------------------------------------------------------


[0;33m[Warning] --sets is deprecated, use --set instead.[0;0;00m
[0;33m[Warning] --sets is deprecated, use --set instead.[0;0;00m
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:35:5-43:5 with factor 2
[Info] unrolling loop at /mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:45:5-57:5 with factor 2
[Info] Setting "ana.int.interval" to true
[Info] no thread creation -> disabling thread analyses "race, deadlock, maylocks, symb_locks, thread, threadid, threadJoins, threadreturn, mhp, region, pthreadMutexType"
[Info] Enabled congruence domain.
[Info] Enabled widening thresholds
[Info] Enabled octagon domain ONLY for:
[Info] __VERIFIER_assert, counter, i, count, tmp, key, a, count, i, j, i___0, j___0, k, size, r, top, expression, d, r, A, p, q, B, tmp, tmp___0, cond, cond
[Info] SV-COMP specification: CHECK( init(main()), LTL(G ! overflow) )
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:41:9-41:18)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:38:9-38:38)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:41:9-41:18)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:38:9-38:38)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:41:9-41:18)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:42:9-42:18)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:47:9-47:36)
[Warning][Integer > Overflow][CWE-191] Unsigned integer underflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:54:13-54:22)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:46:9-46:40)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:47:9-47:36)
[Warning][Integer > Overflow][CWE-191] Unsigned integer underflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:54:13-54:22)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:46:9-46:40)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:47:9-47:36)
[Warning][Integer > Overflow][CWE-191] Unsigned integer underflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:54:13-54:22)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:55:13-55:22)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:59:5-59:36)
[Info][Deadcode] Logical lines of code (LLoC) summary:
  live: 36
  dead: 0
  total lines: 36
[Warning][Deadcode][CWE-571] condition 'tmp < 5' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:35:12-35:23)
[Warning][Deadcode][CWE-571] condition 'tmp < 5' (possibly inserted by CIL) is always true (/mnt/goblint-svcomp/benchexec/sv-benchmarks/c/nla-digbench-scaling/hard-u_unwindbound5.c:35:12-35:23)
SV-COMP result: true
[Info][Witness] witness generation summary:
  total generation entries: 1
