/mnt/thread-witnesses/replication/bench/thread-witnesses/st-cross/../../../ourtool/goblint --conf conf/svcomp-yaml.json --enable dbg.timing.enabled --set 'ana.activated[+]' apron --set ana.apron.domain polyhedra --enable witness.enabled --sets ana.specification ../properties/unreach-call.prp --sets exp.architecture 32bit ../plain/divbin_valuebound10.i


--------------------------------------------------------------------------------


--sets is deprecated, use --set instead.
--sets is deprecated, use --set instead.
SV-COMP specification: CHECK( init(main()), LTL(G ! call(reach_error())) )
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (../plain/divbin_valuebound10.i:39:9-39:18)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (../plain/divbin_valuebound10.i:42:9-42:42)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (../plain/divbin_valuebound10.i:44:9-44:18)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (../plain/divbin_valuebound10.i:47:13-47:22)
[Warning][Integer > Overflow][CWE-191] Unsigned integer underflow (../plain/divbin_valuebound10.i:48:13-48:22)
[Warning][Integer > Overflow][CWE-190] Unsigned integer overflow (../plain/divbin_valuebound10.i:51:5-51:38)
[Info][Deadcode] Logical lines of code (LLoC) summary:
  live: 32
  dead: 0
  total lines: 32
[Warning][Deadcode][CWE-571] condition 'B >= 0U' (possibly inserted by CIL) is always true (../plain/divbin_valuebound10.i:31:5-31:39)
[Warning][Deadcode][CWE-571] condition '1' (possibly inserted by CIL) is always true (../plain/divbin_valuebound10.i:37:12-37:13)
[Warning][Deadcode][CWE-571] condition '1' (possibly inserted by CIL) is always true (../plain/divbin_valuebound10.i:41:12-41:13)
[Warning][Deadcode][CWE-570] condition '0' (possibly inserted by CIL) is always false (../plain/divbin_valuebound10.i:12:73-12:74)
[Warning][Deadcode][CWE-571] condition 'A >= 0U' (possibly inserted by CIL) is always true (../plain/divbin_valuebound10.i:29:5-29:39)
SV-COMP result: unknown
[Info][Witness] witness generation summary:
  total generation entries: 65

vars = 84    evals = 138    narrow_reuses = 3

Timings:
                                  cputime   walltime   allocated   count
Default                            0.278s     0.291s    133.76MB      1×
  preprocess                         0.026s     0.037s      0.01MB      1×
  FrontC                             0.008s     0.008s      4.18MB      4×
  Cabs2cil                           0.006s     0.006s      4.83MB      4×
  mergeCIL                           0.004s     0.004s      3.35MB      1×
  analysis                           0.231s     0.231s    116.55MB      1×
    createCFG                          0.001s     0.001s      0.68MB      1×
      handle                             0.001s     0.001s      0.11MB     34×
      iter_connect                       0.001s     0.001s      0.45MB     34×
        computeSCCs                        0.001s     0.001s      0.27MB     35×
    global_inits                       0.001s     0.001s      0.05MB      1×
    solving                            0.196s     0.196s     67.65MB      1×
      S.Dom.equal                        0.001s     0.001s      0.05MB    141×
      cheap_full_reach                   0.001s     0.001s      0.03MB      1×
      postsolver                         0.062s     0.062s     18.80MB      1×
        postsolver_iter                    0.062s     0.062s     18.64MB      1×
    warn_global                        0.001s     0.001s      0.89MB      1×
    witness                            0.023s     0.023s     34.03MB      1×
      determine                          0.001s     0.001s      0.19MB      1×
      write                              0.023s     0.023s     33.84MB      1×
    result output                      0.001s     0.001s      0.01MB      1×
