/mnt/thread-witnesses/replication/bench/thread-witnesses/st-cross/../../../ourtool/goblint --conf conf/svcomp-yaml-validate.json --enable dbg.timing.enabled --set 'ana.activated[+]' apron --set ana.apron.domain polyhedra --witness.yaml.unassume /mnt/thread-witnesses/replication/bench/thread-witnesses/st-cross/../../../results/st-cross-self2/ourtool.2023-02-15_09-12-33.files/ourtool/veris.c_NetBSD-libc_loop.yml/witness.yml --witness.yaml.validate /mnt/thread-witnesses/replication/bench/thread-witnesses/st-cross/../../../results/st-cross-self2/ourtool.2023-02-15_09-12-33.files/ourtool/veris.c_NetBSD-libc_loop.yml/witness.yml --sets ana.specification ../properties/unreach-call.prp --sets exp.architecture 32bit ../plain/veris.c_NetBSD-libc_loop.i


--------------------------------------------------------------------------------


--sets is deprecated, use --set instead.
--sets is deprecated, use --set instead.
SV-COMP specification: CHECK( init(main()), LTL(G ! call(reach_error())) )
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (../plain/veris.c_NetBSD-libc_loop.i:29:7-29:38)
[Warning][Integer > Overflow][CWE-191] Signed integer underflow (../plain/veris.c_NetBSD-libc_loop.i:29:7-29:38)
[Info][Deadcode] Logical lines of code (LLoC) summary:
  live: 15
  dead: 0
  total lines: 15
[Warning][Deadcode][CWE-570] condition '0' (possibly inserted by CIL) is always false (../plain/veris.c_NetBSD-libc_loop.i:12:73-12:74)
[Info][Witness] witness validation summary:
  confirmed: 0
  unconfirmed: 0
  refuted: 0
  error: 0
  unchecked: 0
  unsupported: 0
  disabled: 0
  total validation entries: 0
SV-COMP result: unknown

vars = 54    evals = 59    narrow_reuses = 1

Timings:
                                  cputime   walltime   allocated   count
Default                            0.075s     0.075s     46.57MB      1×
  preprocess                         0.023s     0.022s      0.01MB      1×
  FrontC                             0.005s     0.005s      4.14MB      4×
  Cabs2cil                           0.005s     0.005s      4.75MB      4×
  mergeCIL                           0.003s     0.003s      3.34MB      1×
  analysis                           0.035s     0.035s     29.40MB      1×
    createCFG                          0.001s     0.001s      0.61MB      1×
      handle                             0.001s     0.001s      0.09MB     34×
      iter_connect                       0.001s     0.001s      0.41MB     34×
        computeSCCs                        0.001s     0.001s      0.23MB     35×
    global_inits                       0.001s     0.001s      0.16MB      1×
    solving                            0.030s     0.030s     24.81MB      1×
      S.Dom.equal                        0.001s     0.001s      0.03MB     60×
      cheap_full_reach                   0.001s     0.001s      0.02MB      1×
      postsolver                         0.006s     0.006s      6.03MB      1×
        postsolver_iter                    0.006s     0.006s      5.99MB      1×
    warn_global                        0.001s     0.001s      0.12MB      1×
    witness                            0.003s     0.003s      0.09MB      1×
      determine                          0.003s     0.003s      0.09MB      1×
    result output                      0.001s     0.001s      0.01MB      1×
