./goblint --conf conf/svcomp-yaml-validate.json --enable dbg.timing.enabled --set 'ana.activated[+]' apron --set ana.apron.domain polyhedra --witness.yaml.unassume /mnt/thread-witnesses/replication/bench/thread-witnesses/st-same/../../../results/st-same/ourtool.2023-01-27_15-24-18.files/loop-head/fermat1-ll.yml/witness.yml --witness.yaml.validate /mnt/thread-witnesses/replication/bench/thread-witnesses/st-same/../../../results/st-same/ourtool.2023-01-27_15-24-18.files/loop-head/fermat1-ll.yml/witness.yml --enable witness.invariant.loop-head --disable witness.invariant.other --disable witness.invariant.accessed --sets ana.specification /mnt/thread-witnesses/replication/sv-benchmarks/c/properties/unreach-call.prp --sets exp.architecture 32bit /mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c


--------------------------------------------------------------------------------


--sets is deprecated, use --set instead.
--sets is deprecated, use --set instead.
SV-COMP specification: CHECK( init(main()), LTL(G ! call(reach_error())) )
[Info][Witness] unassume invariant: (((((-1LL - 2LL * (long long )R) + u >= 0LL && -1LL + v >= 0LL) && r <= 9223372036854775806LL) && 1LL <= v) && -4294967295LL <= u) && -4611686018427387903LL <= r (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:30:5-30:32)
[Warning][Integer > Overflow][CWE-191] Signed integer underflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:50:13-50:22)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:51:13-51:22)
[Info][Witness] unassume invariant: ((((-1LL - 2LL * (long long )R) + u >= 0LL && -1LL + v >= 0LL) && r <= 9223372036854775806LL) && 1LL <= v) && -4294967295LL <= u (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:51:13-51:22)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:43:13-43:22)
[Info][Witness] unassume invariant: (((((-1LL - 2LL * (long long )R) + u >= 0LL && -1LL + v >= 0LL) && r <= 9223372036854775806LL) && 1LL <= v) && -4294967295LL <= u) && -9223372036854775806LL <= r (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:43:13-43:22)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:34:9-34:60)
[Warning][Integer > Overflow][CWE-190][CWE-191] Signed integer overflow and underflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:34:9-34:60)
[Warning][Integer > Overflow][CWE-191] Signed integer underflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:34:9-34:60)
[Info][Witness] unassume invariant: (((((-1LL - 2LL * (long long )R) + u >= 0LL && -1LL + v >= 0LL) && r <= 9223372036854775806LL) && 1LL <= v) && -4294967295LL <= u) && -9223372036854775806LL <= r (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:35:13-35:22)
[Warning][Integer > Overflow][CWE-190][CWE-191] Signed integer overflow and underflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:39:6-39:57)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:39:6-39:57)
[Warning][Integer > Overflow][CWE-191] Signed integer underflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:39:6-39:57)
[Info][Witness] unassume invariant: ((((-1LL - 2LL * (long long )R) + u >= 0LL && -1LL + v >= 0LL) && r <= 9223372036854775806LL) && 1LL <= v) && -4294967295LL <= u (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:40:17-40:25)
[Info][Witness] unassume invariant: ((((-1LL - 2LL * (long long )R) + u >= 0LL && -1LL + v >= 0LL) && r <= 9223372036854775806LL) && 1LL <= v) && -4294967295LL <= u (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:38:16-38:17)
[Warning][Integer > Overflow][CWE-190][CWE-191] Signed integer overflow and underflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:47:6-47:57)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:47:6-47:57)
[Warning][Integer > Overflow][CWE-191] Signed integer underflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:47:6-47:57)
[Info][Witness] unassume invariant: (((((-1LL - 2LL * (long long )R) + u >= 0LL && -1LL + v >= 0LL) && r <= 9223372036854775806LL) && 1LL <= v) && -4294967295LL <= u) && -4611686018427387903LL <= r (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:48:17-48:25)
[Info][Witness] unassume invariant: (((((-1LL - 2LL * (long long )R) + u >= 0LL && -1LL + v >= 0LL) && r <= 9223372036854775806LL) && 1LL <= v) && -4294967295LL <= u) && -4611686018427387903LL <= r (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:46:16-46:17)
[Warning][Integer > Overflow][CWE-190][CWE-191] Signed integer overflow and underflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:55:5-55:66)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:55:5-55:66)
[Warning][Integer > Overflow][CWE-191] Signed integer underflow (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:55:5-55:66)
[Info][Deadcode] Logical lines of code (LLoC) summary:
  live: 32
  dead: 0
  total lines: 32
[Warning][Deadcode][CWE-571] condition '1' (possibly inserted by CIL) is always true (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:38:16-38:17)
[Warning][Deadcode][CWE-571] condition '1' (possibly inserted by CIL) is always true (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:46:16-46:17)
[Warning][Deadcode][CWE-571] condition '1' (possibly inserted by CIL) is always true (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:33:12-33:13)
[Success][Witness] invariant confirmed: -4611686018427387903LL <= r (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:33:12)
[Success][Witness] invariant confirmed: -4294967295LL <= u (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:33:12)
[Success][Witness] invariant confirmed: 1LL <= v (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:33:12)
[Success][Witness] invariant confirmed: r <= 9223372036854775806LL (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:33:12)
[Success][Witness] invariant confirmed: -1LL + v >= 0LL (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:33:12)
[Warning][Integer > Overflow][CWE-190] Signed integer overflow
[Success][Witness] invariant confirmed: (-1LL - 2LL * (long long )R) + u >= 0LL (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:33:12)
[Success][Witness] invariant confirmed: -9223372036854775806LL <= r (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:38:16)
[Success][Witness] invariant confirmed: -4294967295LL <= u (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:38:16)
[Success][Witness] invariant confirmed: 1LL <= v (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:38:16)
[Success][Witness] invariant confirmed: r <= 9223372036854775806LL (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:38:16)
[Success][Witness] invariant confirmed: -1LL + v >= 0LL (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:38:16)
[Success][Witness] invariant confirmed: (-1LL - 2LL * (long long )R) + u >= 0LL (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:38:16)
[Success][Witness] invariant confirmed: -4294967295LL <= u (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:46:16)
[Success][Witness] invariant confirmed: 1LL <= v (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:46:16)
[Success][Witness] invariant confirmed: r <= 9223372036854775806LL (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:46:16)
[Success][Witness] invariant confirmed: -1LL + v >= 0LL (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:46:16)
[Success][Witness] invariant confirmed: (-1LL - 2LL * (long long )R) + u >= 0LL (/mnt/thread-witnesses/replication/sv-benchmarks/c/nla-digbench/fermat1-ll.c:46:16)
[Info][Witness] witness validation summary:
  confirmed: 17
  unconfirmed: 0
  refuted: 0
  error: 0
  unchecked: 0
  unsupported: 0
  disabled: 0
  total validation entries: 17
SV-COMP result: unknown

vars = 59    evals = 154    narrow_reuses = 12

Timings:
                                  cputime   walltime   allocated   count
Default                            0.216s     0.220s    124.35MB      1×
  preprocess                         0.037s     0.036s      0.01MB      1×
  FrontC                             0.006s     0.006s      4.18MB      4×
  Cabs2cil                           0.009s     0.009s      4.86MB      4×
  mergeCIL                           0.004s     0.004s      3.35MB      1×
  analysis                           0.154s     0.156s    106.41MB      1×
    createCFG                          0.001s     0.001s      0.64MB      1×
      handle                             0.001s     0.001s      0.10MB     34×
      iter_connect                       0.001s     0.001s      0.42MB     34×
        computeSCCs                        0.001s     0.001s      0.24MB     35×
    FrontC                             0.001s     0.001s      0.23MB     34×
    Cabs2cil                           0.006s     0.006s      3.19MB     34×
    global_inits                       0.001s     0.001s      0.05MB      1×
    solving                            0.120s     0.122s     81.24MB      1×
      S.Dom.equal                        0.001s     0.001s      0.06MB    166×
      base unassume                      0.014s     0.014s     13.55MB     29×
      cheap_full_reach                   0.001s     0.001s      0.03MB      1×
      postsolver                         0.020s     0.021s     14.10MB      1×
        postsolver_iter                    0.020s     0.021s     14.04MB      1×
    warn_global                        0.001s     0.001s      0.19MB      1×
    witness                            0.001s     0.001s      0.18MB      1×
      determine                          0.001s     0.001s      0.18MB      1×
    result output                      0.001s     0.001s      0.01MB      1×
